Introduction to Verilog programming on an FPGA device. Counters and frequency dividers.

Laboratory Class 01 - 21 September 2021

Topics

  • A short overview of FPGA devices and HDL programming languages.

  • Introductory problem: design of a 1 Hz counter with 8–LED array display, relying on standard analog and digital circuitry and an 8 Hz clock source.

  • Basic hardware circuits:

    • frequency divider;

    • counter.

  • Verilog programming language:

    • module architecture;

    • example: development of an 8–bit, 1 Hz counter with an 8–LED array display;

    • basic modules implementing basic hardware circuits:

      • frequency divider;

      • counter.

Problems:

  • development of an 8–bit, 1 Hz counter with an 8–LED array display, working from 0 to 255;

  • development of an 8–bit, 1 Hz counter with an 8–LED array display, working from 0 to 9;

  • development of an 8–bit, 10 Hz counter with an 8–LED array display, working from 0 to 9.

Additional problems:

  • development of a 10 Hz counter, working from 0 to 99, with a 2–digits BCD1 coding and a 2 x 4–LED array display;

  • development of a 10 Hz down counter.


Disclaimer

This part of the note does NOT aim to teach Verilog or how to survive in a laboratory. The first can be learned using apposite websites like hdlbits while the second skill requires years of training and struggle. The only way to learn how to survive in a laboratory is to be in a lab. It doesn’t need to be an expensive one tho. To start a beginner’s FPGA and a basic oscilloscope are enough2. In the worst-case there even exist simulators. Better than nothing, I guess.

Basic hardware circuits:

Frequency dividers and counters are similar under many aspects to the extent that you can imagine a frequency divider as a counter and a threshold. When the desired number of input positive edges are counted, a positive edged is generated as output. Usually, frequency dividers are designed as a cascade of data flip flops (D-type FF).

D-type flip flop used as frequency halver

A counter can be obtained in the same way by connecting the output \(Q\) of each FF to the desired circuit. Check this interactive simulation to better understand how it works.

More info can be found here. This website is also the source of the image used.


1

Binary coded decimal. Each digit is represented using four LEDs; they are placed in a decimal representation. e.g: \(34\) would be written as 0011 0100 in BCD.

2

I studied Verilog on hdlbits but I do not own the GoBoard or the EspoTek Labrador Board so I can not say anything about their quality. These are just linked to helping you start your researches